researcher
Ing. Jana Bečková
International
Finished
- Design and testability of low power processor and MDCT algorithm in 90 nm CMOS technologyProgram: Inter-academic agreementDuration: 1. 1. 2010 – 31. 12. 2012
National
Current
- Intelligent sensor systems and data processingProgram: VEGADuration: 1. 1. 2023 – 31. 12. 2026
Finished
- Processing of sensor data via Artificial Intelligence methods.Program: VEGADuration: 1. 1. 2019 – 31. 12. 2022
- New architectures for increasing the reliability of digital cores and systemsProgram: VEGADuration: 1. 1. 2015 – 31. 12. 2018
- Built-in self-repair for logic cores embedded in system-on-chipProgram: VEGADuration: 1. 1. 2012 – 31. 12. 2014
- Reliable architectures and digital systems testabilityProgram: VEGADuration: 1. 1. 2008 – 31. 12. 2010